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To find out more about our current opportunities, please click the links below to expand the job description at the bottom of the page. To apply for a role please e-mail us with your CV and the role reference you would like to be considered for. We take your privacy seriously and have processes and policies in place to protect the data you share with us. Please see our recruitment privacy notice for full details

We are always looking for exceptional people to join our growing team. If a specific role you are interested in is not be listed here, we would still be happy to review your CV and contact you if a suitable position becomes available in the future. Click here to contact us.

* When shown against a specific vacancy below indicates direct applications only - absolutely NO AGENCIES, including those on our PSL.

Cambridge, UK

DisplayLink is looking to further expand its IC verification team with additional firmware / verification engineers who will specialise in the verification of reusable subsystems for our SoCs. Subsystems could contain one or more CPUs, USB, Ethernet, HDMI/DP, proprietary IP or a combination of these.

You will have either an IC or FW background with a strong interest in embedded software and associated methodologies for the purpose of IC development.  The role will involve working with IC design, verification and firmware engineers to develop our test infrastructure and associated testcases which typically use multiple embedded processors and Python-based stimulus within a Python infrastructure. These are portable and reused between subsystem & SoC levels and between simulation, FPGA & the final IC.

With a philosophy of continuous improvement, every engineer is encouraged to propose enhancements to our flow and contribute to the advancement of our verification methodology

Essential skills:

Python

Embedded C & assembler for 32-bit processors

Subsystem/SoC level verification of ASIC/FPGA

Simulation - Mentor Questasim or equivalent 

Firmware/IC debug at RTL level

Desired skills:

Prior IC tapeout experience

UVM

System C

Embedded C++, RTOS

Video interfaces (HDMI and / or DP)

USB

Ethernet

Git, Jenkins and / or SCons

Interested? Email us.

Our IC Verification team is growing, and we are looking for talented IC verification engineers to join us. This challenging and varied role will involve verification of both IPs and SoCs.

The work will cover all aspects of the verification flow from verification planning and development of environments through to testcase writing, gathering coverage and maintaining regression suites. Our verification engineers have a wide range of tools at their disposal from simulation and formal methods through to FPGAs and will use each as appropriate. With a philosophy of continuous improvement every engineer is encouraged to propose enhancements to our flow and contribute to the advancement of our verification methodology.

To excel in these roles, we look for experience of the following verification techniques:

SystemVerilog/UVM

Verification planning and closure

Assertions

Formal verification

Low power/UPF

Python

Experience of standard bus, network and display interfaces e.g. USB, Ethernet, PCIe, DisplayPort, are always a bonus for DisplayLink.

Interested? Email us.

Platform Firmware Developers will be using their systems knowledge and experience to develop Firmware that would be run on the SoC (System on Chip) in development to aid in making sure it meets the requirements. This may involve video and audio processing at high pixel rates, displays systems (HDMI, DisplayPort), high speed data handling (USB, ETH, DDR), and Security (HDCP). They will be expected to collaborate with IC Designers, IC Verification Engineers and other Firmware Developers across multiple sub-teams.

The Firmware is written in Embedded C++ and executes at the top-level IC simulator, FPGA and ASIC. The Firmware evolves towards a production code that involves object oriented design and unit testing. The role will also need a good understanding of how to adapt existing production Embedded C++ code to the test setup, which uses a Linux-based GCC development environment and CMake. Some knowledge of embedded CPUs is assumed, along with an understanding of common RTOS behaviours. Previous experience of JTAG source-level debuggers would be an advantage, as would any experience in an Agile development environment.

Although we program in embedded C++ we are happy to consider embedded C candidates who have a good level of C++ experience in some form.

Interested? Email us.

We are looking for an experienced Principal level IC Design Engineer with Team Lead experience to augment our existing IC design team to design and implement our innovative network display products. The role will involve many or all aspects of the design process from specification and architecture through RTL design of modules, functional verificationsynthesis and timing closure, to silicon validation. Definition and development of architecture both at IP and system level are also key aspects of this role. 

We look for a proven track record of multiple successful ASIC development cycles and experience of FPGA prototyping

Of particular interest are candidates with CVs that mention a few of:

Network on Chip (NoC

System on Chip (SoC) design / integration (40nm & below)

Low power design / UPF / Multi power domain 

USB / DisplayPort

Use of Python

Video encoder techniques

ARC CPU experience

Sign off check experience – LINT, SVA, Spyglass tools, Synthesis and constraints

RTL design (VHDL or Verilog)

Verification

Integrating external IP

We are also interested in engineers with knowledge / experience relating to:

STA – Usage of the Primetime tool

Previous experience of successful tapeouts, particularly at lower geometries i.e 12nm and below

Synthesis (ideally mentioning DC/Design Compiler/Synopsys toolset)

Scripting ability / automation

Constraint generation/debug (SDC)

Layout skills (floorplanningrouting)

Interested? Email us.

DisplayLink has an exciting key opportunity for a Senior DFT Engineer to carry out hands-on DFT design, implementation and debug using Synopsys DFT tools.

You will bring relevant expertise in large silicon systems implemented in leading technology nodes to improve and shape our DFT methodologies.

In this position you will:

Implement and validate ATPG structures, via:

Partitioning for ATPG and hierarchical approaches

ATPG compression and serialization

Scan insertion and design rule fixing

STA constraints, Primetime execution and timing exception flow

Gate level simulation and debug

Validate DFT structures, via:

Synopsys SMS Memory BIST and repair

IP BIST, typically for DDR and SERDES interfaces

VHDL / Verilog design of test structures

System Verilog simulation of DFT test cases

Vector generation, translation and re-simulation

Understand and improve test yields, address test vector instabilities, via:

Validation of test structures across PVT (Vector bring-up and characterization)

IP test enhancement and validation, especially high-speed digital interfaces

Assist others in production test program development

Interested? Email us.

We are looking for an experienced IC Design Engineer to augment our existing IC design team to design and implement our innovative network display products. The role will involve many or all aspects of the design process from specification and architecture through RTL design of modules, functional verification, synthesis and timing closure, to silicon validation. Definition and development of architecture both at IP and system level are also key aspects of this role. 

We look for a proven track record of multiple successful ASIC development cycles and experience of FPGA prototyping

Of particular interest are candidates with CVs that mention a few of:

Network on Chip (NoC

System on Chip (SoC) design / integration (40nm & below)

Low power design / UPF / Multi power domain 

USB / DisplayPort

Use of Python

Video encoder techniques

ARC CPU experience

Sign off check experience – LINT, SVA, Spyglass tools, Synthesis and constraints

RTL design (VHDL or Verilog)

Verification

Integrating external IP

We are also interested in engineers with knowledge / experience relating to:

STA – Usage of the Primetime tool

Previous experience of successful tapeouts, particularly at lower geometries i.e 12nm and below

Synthesis (ideally mentioning DC/Design Compiler/Synopsys toolset)

Scripting ability / automation

Constraint generation/debug (SDC)

Layout skills (floorplanning, routing)

 

Interested? Email us.

Katowice, Poland

We are looking for developers with C++ development experience who would like to use their practical knowledge of writing commercial software for any of the platforms: Windows, macOS, Linux or Chrome OS.

This is a position which allows you to show initiative and engage in solving complex problems.

Our customers include Dell, HP, Lenovo, Asus, AOC, Targus, Kensington and many others.

WE ARE LOOKING FOR NEW COLLEAGUES WHO:

  • Have experience in C++ Object Oriented Design and Development.
  • Can communicate with colleagues from different locations in English.
  • Share good software craftsmanship practices.
  • Would like to use their practical knowledge of writing commercial software for any of the platforms: Windows, macOS, Linux or Chrome OS.
  • Show initiative and want to engage in solving complex problems.

WHAT YOU WILL DO:

  • Design and develop cross-platform software that powers DisplayLink's mainstream products.
  • Participate in full software development lifecycle of chip design (from IC to host drivers).
  • Solve problems in complex environments (latency, CPU constrains, USB bandwidth).
  • Deliver innovative, high quality software solutions with modern C++ technology stack.

WHAT TECHNOLOGIES WE USE:

  • C++.
  • Modern toolchains.
  • Python.
  • GIT / SVN.
  • Google Test, GMock.
  • Assembler.
  • The latest standards of USB, GPU, Ethernet.

WE OFFER:

  • Agile environment with cross functional teams working in Scrum/Kanban.
  • Training programmes, both internal and external.
  • Strong support from senior colleagues when you join and throughout your career.
  • Relocation expenses as appropriate (for Katowice location).
  • Flexible working hours.
  • Parking space available for every employee.
  • Expanded social, sport, educational, hobbies, and health packages.
  • Employee referral bonus.
  • Additional health insurance package for you and your family

…and much more – dare to ask for details!

Whether you are or not convinced, please send us an email to rekrutacja@displaylink.com and made an appointment to visit us in our office in Katowice. You can then meet us and speak with our team members about the working environment.

English is our corporate language, so please send your CV to us in English! We guarantee absolute confidentiality and protection of personal data. Personal data will only be used in the recruitment process and future work

Please add to your CV:

"Potwierdzam prawdziwosc przekazanych danych i wyrazam zgode na przetwarzanie i administrowanie moimi danymi przekazanymi do DisplayLink (USA, UK, PL) do celów rekrutacji pracowników (zgodnie z ustawa o ochronie danych osobowych z dnia 29.08.97 Dz.U.133 Poz.883). Jednoczesnie oswiadczam, ze zostalam/em poinformowana/y, ze mam prawo dostepu do tresci swoich danych, prawo ich poprawiania, prawo sprzeciwu wobec ich przetwarzania w wy?ej opisanym celu oraz wobec przekazywania danych innym podmiotom, a takze prawo zazadania zaprzestania przetwarzania moich danych osobowych ze wzgledu na moja szczególna sytuacje. Podanie danych jest dobrowolne. Jednoczesnie wyrazam zgode na podejmowanie czynnosci majacych na celu weryfikacje prawdziwosci przekazanych przeze mnie dokumentów i informacji w nich zawartych."

Interested? Email us.

This is an ideal position for an Embedded Software Engineer with experience in C++ development for System on Chip products and to use your experience of using RTOS and practical knowledge of communication standards.

Our solutions are used by Dell, HP, Lenovo, Toshiba, Asus, AOC, Targus, Kensington, Belkin and many others.

 

WE ARE LOOKING FOR NEW COLLEAGUES WHO:

  • Have experience in C++ development for System on Chip products
  • Speak English language and can communicate with colleagues from different locations.
  • Show initiative and willingness to solve complex problems.
  • Share good software craftsmanship spirit.

WHAT YOU WILL DO:

  • Design and develop embedded software that powers DisplayLink's mainstream products.
  • Participate in full software development lifecycle of chip design (from IC simulation and FPGA to ASIC).
  • Deliver innovative, high quality software solutions with modern C++ technology stack.
  • Follow best practices of writing software (SOLID, OOD principles, unit tests, code review).
  • Solve problems in complex environment (latency, CPU constrains, USB bandwidth).
  • Write low level drivers as well as high level application code.

WHAT TECHNOLOGIES WE USE:

  • Modern C++ toolchains.
  • RTOS.
  • Python.
  • CMake.
  • GIT.
  • Google Test, GMock.

WE OFFER:

  • Agile environment with cross functional teams working in Scrum/Kanban
  • Training programmes, both internal and external
  • Strong support from senior colleagues when you join and throughout your career
  • Relocation expenses as appropriate (for Katowice location)
  • Flexible working hours
  • Parking space available for every employee
  • Expanded social, sport, educational, hobbies, and health packages
  • Employee referral bonus
  • Additional health insurance package for you and your family

…and much more – dare to ask for details!

Whether you are or not convinced, please send us an email rekrutacja@displaylink.com and made an appointment to visit us in our office in Katowice. You can then meet us and speak with our team members about the working environment.

English is our corporate language, so please send your CV to us in English!

We guarantee absolute confidentiality and protection of personal data.

Personal data will only be used in the recruitment process and future work.

 

Please add to your CV:

"Potwierdzam prawdziwosc przekazanych danych i wyrazam zgode na przetwarzanie i administrowanie moimi danymi przekazanymi do DisplayLink (USA, UK, PL) do celów rekrutacji pracowników (zgodnie z ustawa o ochronie danych osobowych z dnia 29.08.97 Dz.U.133 Poz.883). Jednoczesnie oswiadczam, ze zostalam/em poinformowana/y, ze mam prawo dostepu do tresci swoich danych, prawo ich poprawiania, prawo sprzeciwu wobec ich przetwarzania w wy?ej opisanym celu oraz wobec przekazywania danych innym podmiotom, a takze prawo zazadania zaprzestania przetwarzania moich danych osobowych ze wzgledu na moja szczególna sytuacje. Podanie danych jest dobrowolne. Jednoczesnie wyrazam zgode na podejmowanie czynnosci majacych na celu weryfikacje prawdziwosci przekazanych przeze mnie dokumentów i informacji w nich zawartych."

 

Interested? Email us.

UK employee benefits

  • Competitive Salary dependent on experience and qualifications
  • Flex time schedule: Allows employees to vary their start and finish times around our core hours of 10am to 4pm
  • 25 days annual holiday
  • Buy/Sell Holiday scheme
  • Group Life cover at 4 times basic salary
  • Generous Company Pension Contribution
  • Permanent Health Insurance
  • Company Funded Private Health Cover
  • Relocation Expenses
  • Employee Referral Bonus
  • Subsidised Gym Membership

US employee benefits

  • Competitive Salary dependent on experience and qualifications
  • Up to 33 vacation days annually
  • Health, dental, and life insurance package
  • Relocation expenses
  • Employee Referral Bonus
  • Subsidized Gym Membership

Poland employee benefits

  • Competitive Salary dependent on experience and qualifications
  • "Benefit 600 plan" Choose to spend on a range of benefits as you like
  • Relocation Expenses
  • Employee Referral Bonus
  • 26 days annual holiday
  • Training programmes, both internal and external
  • Flexible working hours
  • Parking space available for every employee
  • Additional health insurance package for you and your family
  • Exciting team building events
  • Table football, table tennis and VR gaming setup
  • Weekly community salad day, hot-dog day, sweets, full fridge and more other food related opportunities
  • Friendly and helpful environment with opportunities for personal development
  • Strong support from colleagues when you join and throughout your career
  • Permanent job contract at Katowice office

Taiwan employee benefits

  • Competitive Salary dependent on experience and qualifications
  • Up to 33 vacation days annually
  • Company Funded Private Health Cover
  • Relocation Expenses
  • Employee Referral Bonus
  • Subsidized Gym Membership
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